[Dec 1, 2012] Or a proper recollection of what happenned to Intel’s memory business in the 1st half of the 80’s as the most dramatic evidence of a strategic inflection point (which also lead to the formulation of the concept itself, see more broadly desribed) so far.
Here is a typical graphical representation of this event together with typical outcomes:
actually for the case of social media as the last significant example. You can read about that case in Be strategic. Be Relevant. It’s not too late – yet [Overwhelming Communications blog, March 13, 2011]. In terms of outcomes you should especially recognise the role of:
Dissonance gap: The gap between the strategic inflection point and recognition of the shift. During this period, diverging ideas, practices and approaches cause conflicting opinions.
In addition to all that here are my exerpts about the original factual evidence which are taken from the following scientific article: A PROCESS MODEL OF STRATEGIC BUSINESS EXIT: IMPLICATIONS FOR AN EVOLUTIONARY PERSPECTIVE ON STRATEGY [Robert A. Burgelman, Strategic Management Journal, Vol. 17, 193-214 (1996)] (available here for download):
Table 1. Key events in the evolution of DRAMs at Intel: 1970-85
1970 E1. Intel introduced the first 1K (kilobit) dynamic random access memory (DRAM) in volume. The product used the new metal-oxide semiconductor (MOS) process technology. This process technology was relatively slow but less power consuming than the standard bipolar process technology. Intel was the first successful mover in DRAMs. 1972-74 E2. Intel introduced 4K DRAMs. Intel captured more than 80% of the 4K DRAM market in 1974.
E3. The first competitive challenge came from Mostek, a new startup. Mostek focused on user-friendliness of DRAMs in the 4K DRAM generation.
1976-77 E4. Intel introduced a standard 16K DRAM. Intel captured more than 35% of the 16K DRAM market in 1976.
E5. The competitive challenge from Mostek and others continued. By 1979, Intel’s market share in standard 16K DRAM was less than 5%.
E6. High demand for EPROMs created a shortage in Intel’s manufacturing capacity. For the first time, DRAM manufacturing capacity was shifted toward the higher-margin EPROM products.
1979 E7. Intel introduced the first 5-volt ‘single-power-supply’ 16K DRAM. Single-power supply greatly simplified the user’s design and production tasks. In 1979, Intel was the only supplier of single-power-supply 16K DRAMs and captured a price premium of double the industry average for three-power-supply 16K DRAMs.
E8. Intel expected the 64K DRAM generation to be introduced later and to be based on single power supply. Fujitsu introduced a standard 64K DRAM in 1979 and captured a large market share.
E9. The single-power-supply 16K DRAM remained a small-niche product.
E10. Intel fell behind in manufacturing yields relative to top Japanese producers of DRAMs (Prestowitz, 1988: 46).
1982 E11. Intel’s 64K DRAM with ‘redundancy’ entered production. Redundancy involves adding an extra column of memory elements so that, in the event of a process-induced defect, the auxiliary column could be activated. This allows a defective memory chip (at testing) to be reprogrammed before shipment and to increase yields. Intel expected that ‘redundancy’ would help overcome its disadvantage in manufacturing yields relative to the Japanese, and that the 256K DRAM generation would be based on the redundancy process technology.
E12. However; Fujitsu and Hitachi entered with a standard 256K DRAM in 1982 and captured a large market share.
E13. Intel was now far behind in manufacturing competence relative to the Japanese.
… … March 1985 …
E30. COO Andy Grove felt strongly that the burgeoning logic (microprocessor) business needed to get more resources
Summer 1985 …
E34. The General Manager of the Components Group stepped down and was reassigned to another business area. Andy Grove assumed direct operational control over the DRAM exit process. He assigned two senior managers to immediately and fully implement the DRAM exit decision.
October 1985 E35. The decision was reached to close Fab 5 for DRAM production. Fab 5 was to be transformed into a process technology site for microprocessors. Animosity and mistrust between manufacturing and process technology personnel flared at Fab 5.
E36. Andy Grove went to Portland to speak to the group: ‘Welcome to the Mainstream Intel’. That is, Intel the ‘microcomputer company’.
Intel’s initial success in the 1K (kilobit) DRAM (1971-73) was due to the ability of its technologists to come up with a process technology that allowed production yields sufficiently high to beat magnetic core memory, which was the industry standard of the day, in the market (E1). Process technology was therefore viewed by Intel management as the firms’ ‘distinctive competence’ (Selznick, 1957) on which its ability to differentiate its products and get a premium price depended (E7, E11, E18, E22). Having maintained leadership in the 4K DRAM generation (1972-76) (E2, E3), Intel’s process technologists came up with the first 5-volt single-power-supply 16K DRAM in 1979. Intel process technologists decided to focus on the single-power-supply 16K DRAM because they projected a relatively long life cycle for the 16K generation due to the technological challenges posed by the 64K generation (E18). They also believed that the single-power-supply process would eventually dominate the memory industry. They considered it too risky to tackle both the 64K DRAM generation and the single power supply in the same product.
While it is usually difficult to observe distinctive competence independent of the successful product with which it is associated, and the risk of tautology is high, Intel’s pattern of strategic actions offers the opportunity to make independent observations. When changes in the DRAM industry structure shifted the basis of competition from process technology to largescale precision manufacturing, Intel continued to rely on process technology to compete in four successive product generations. The first independent observation concerned the 16K DRAM generation. But, as documented below, inertial deployment of process technology competence was also observed in the 64K, 256K, and 1 Meg (megabit) product generations. Paradoxically, the distinctive competence that provided Intel with its initial competitive advantage became a source of failure later on.
Falling behind reinforces the impetus process
Falling behind in the market made it difficult for the DRAM business managers to compete with Intel’s other businesses for resources. Business managers had tried to reposition Intel’s single power-supply 16K DRAM as a niche product that would fetch a higher unit price (‘2x’). They had expected that eventually the whole 16K market would have to go for single-power-supply. This did not happen for the 16K generation, however, and further impetus for exit was gained when the strategy to reposition Intel’s DRAMs as niche products failed (E9; Cogan and Burgelman, 1990).
Intel was already late in the 64K generation and Japanese companies had entered the DRAM market in 1979. In addition, Intel’s 64K product design was flawed and expected to result in uncompetitive low manufacturing yields (E10). The DRAM process technology group responded by introducing a new process technology called ‘redundancy’, as a way to overcome the low yield problem (E11). This new process, however, had a major defect which showed up late in its development. Intel introduced its 64K DRAM with redundancy only in 1982. These delays were fatal for Intel’s strategic position in the 64K generation. A former General Manager of the Memory Components Division (during the early 1980s) said that he took a 1-week trip to see the Intel sales engineers and explain that Intel would be late. He said (Cogan and Burgelman, 1990: 15):
“The sales force was very disappointed in the company’s performance. Any sales force wants a commodity line. It’s an easy sell and sometimes it’s a big sell. That trip was perhaps the most difficult time in my whole career. When I announced we would be late with the product, the implication was that Intel would not be a factor in the 64K generation.”
Having assessed that they were behind in the 64K generation, the DRAM process technology group took another gamble. They had come up with yet another innovative process technology—complementary metal-oxide semiconductor (CMOS)—which was to eventually supersede the standard n-channel MOS (NMOS) technology. They decided to apply the CMOS technology to a new 64K DRAM product as well as in the 256K generation (E16). This raised the difficult question for the memory components division about how to effect the transition from NMOS to CMOS. The NMOS products had been made at the Chandler (Arizona) facility, but that capacity had been shifted to microcontrollers based on the maxmize margin-per-wafer start rule. In early 1984, the decision was made to phase out the NMOS line (E17).
The former General Manager of the Memory Components Division (during the early 1980s) said that the new business strategy was to reposition Intel in DRAMs. The idea was to create a niche market with premium pricing for 64K and 256K CMOS products, so that Intel could maintain a memory presence while accelerating back into an overall leadership position at the 1 Meg (Megabit) generation. But for both the 64K and 256K DRAM products, the innovative solution did not produce competitive advantage. The large majority of customers for the 64K generation were looking for standard products of high quality (few defect devices) at low prices. Japanese companies provided what customers wanted at very low prices. The Japanese had introduced standard 256K DRAMs in 1982 (E12), and Intel had fallen far behind the Japanese in manufacturing yields (E13). Intel entered with its CMOS 256K product only in 1984, and it remained a small niche product. The former General Manager of the Memory Components Division (during the early 1980s) said that standard DRAMs were being sold at less than half of the price Intel was asking, and the improved performance of the CMOS chips just wasn’t worth it to most customers. Intel’s repositioning effort resulted in completely losing strategic position in the DRAM market. Intel’ s market share shrunk from more than 80 percent in the 4K DRAM generation in 1974 to less than 1 percent in the 256K DRAM generation in 1984 (Cogan and Burgelman, 1990). Repositioning thus failed to reestablish Intel as a key player in the industry. Also, prices for the niche products were lower than expected, making it harder for DRAMs to compete with other products for Intel’s scarce manufacturing resources.
The Director of Technology Development observed that Intel’s DRAM business had entered a ‘death spiral’. In the face of strong competition from Japanese manufacturers, business managers’ focus on the more profitable products and technology development’ s preoccupation with leading-edge processes contributed to missing the
DRAM mainstream market. This led to cutbacks in manufacturing capacity and budgets which made it even more difficult to compete. This manager, in an interview in October 1988, anticipated a similar vicious circle (‘death spiral’) for EPROMs, which had also become a commodity product, and correctly foresaw the decision to exit from EPROM manufacturing, which happened in 1991.
For Intel’s top management, the strategic context of DRAMs had always been very clear. DRAMs had very strong legitimacy. DRAMs was the business that ‘made Intel’, as one senior manager put it, and some top managers, including the CEO, viewed DRAMs as a core business and one that served as technology driver on which the learning curve of the company depended. It was not easy for top management to admit that the legitimacy of DRAMs was vanishing. And it was difficult to decide to exit from DRAMs even though objective analysis seemed to suggest that this was the appropriate course of action in light of Intel’s strategic alternatives.